USB-SPI Interface Adapters Comparison

The Serial Peripheral Interface (SPI) is a synchronous serial data link, developed by Motorola. SPI bus operates either in full-duplex or in half-duplex mode and can transfer data over short distances at high speeds. In this article we compare USB-SPI interface of several interface adapters. The comparison chart includes adapters from the cheapest on the market to the most powerful ones. Our article can help you choose the USB-SPI interface adapter that fits your purpose best.

USB SPI Interface

USB SPI Adapter	DLN-1	DLN-2	DLN-4M	DLN-4S
All 4 SPI Modes Support
SPI Interface Clock Frequency	2 kHz - 4 MHz	2 kHz - 18 MHz	376 kHz - 48 MHz	376 kHz - 48 MHz
Frame Size	Configurable (8-bit to 16-bit)	Configurable (8-bit to 16-bit)	Configurable (8-bit to 16-bit)	Configurable (8-bit to 16-bit)
SPI Bus Voltage	3.3V (5V tolerant)	3.3V (5V tolerant)	3.3V	3.3V
USB Interface	Full Speed (12MHz)	Full Speed (12MHz)	High Speed (480MHz)	High Speed (480MHz)
Interfaces
SPI Master Interface
SPI Slave Interface
Synchronous Interface
Asynchronous Interface
Event-Driven Interface
Additional Interfaces	I2C Master Interface GPIO Interface ADC, PWM Pulse Counter	I2C Master Interface GPIO Interface ADC, PWM Pulse Counter	I2C Master Interface GPIO Interface ADC, PWM Pulse Counter UART	I2C Master Interface I2C Slave Interface GPIO Interface ADC, PWM Pulse Counter UART
Configurable Delays
Configurable Delay Between Transfers
Configurable Delay After Slave Selection
Configurable Delay Between Slave Selections

PC USB Host Powered
SPI GUI Demo Examples
Supported Operation Systems
RoHS Compliant
Price (PCB board without enclosure)	$58.70	$79.40	$116	$187
Price (Adapter with enclosure)			$140.90	$211.90

Frames

A frame is a single portion of data sent through SPI bus. Splitting the data transfer into frames allows to set delays and configure SS line release between such frames.

DLN-1, DLN-2, DLN-4M and DLN-4S USB-SPI adapters support adjustable frame size from 8 to 16 bits.

The size of the frame does not limit the size of the buffer to be transfered. The sending function supports a buffer of certain size. You can call the function several times to send a larger buffer.

SPI Clock Frequency

The SPI bus clock is used to synchronize data transfer between master and slave devices.

DLN-1 USB-SPI Interface Adapter supports SPI clock frequency from 2 kHz up to 4 MHz.
DLN-2 USB-SPI Interface Adapter supports SPI clock frequency from 2 kHz up to 18 MHz.
DLN-4M and DLN-4S USB-SPI interface adapters are more powerful. They support SPI bus clock frequency up to 48 MHz, but the low frequency bound for them are only 376 kHz.

Taken into account that DLN-4M and DLN-4S USB-SPI interface adapters are based on USB high speed interface (up to 480 MHz), they can provide much higher bandwidth over both USB and SPI buses.

SPI modes

Clock polarity (CPOL) and clock phase (CPHA) are the main parameters that define a clock format to be used by the SPI bus. Depending on CPOL parameter, SPI bus clock may be inverted or non-inverted. CPHA parameter is used to shift the sampling phase.

All DLN-1, DLN-2 and DLN-4 series USB-SPI interface adapters support all four SPI modes, formed by different combinations of these parameters.

CPOL=0, CPHA=0

The clock idle state is zero. The data on MISO and MOSI lines must be stable while the clock is high and can be changed when the clock is low. The data is captured on the clock's low-to-high transition and propagated on high-to-low clock transition.

CPOL=0, CPHA=1

The clock idle state is zero. The data on MISO and MOSI lines must be stable while the clock is low and can be changed when the clock is high. The data is captured on the clock's high-to-low transition and propagated on low-to-high clock transition.

CPOL=1, CPHA=0

The clock idle state is one. The data on MISO and MOSI lines must be stable while the clock is low and can be changed when the clock is high. The data is captured on the clock's high-to-low transition and propagated on low-to-high clock transition.

CPOL=1, CPHA=1

The clock idle state is one. The data on MISO and MOSI lines must be stable while the clock is high and can be changed when the clock is low. The data is captured on the clock's low-to-high transition and propagated on high-to-low clock transition.

SPI Master and SPI Slave Interfaces

All listed USB-SPI interface adapters support SPI master interface functionality.
DLN-4S USB-SPI interface adapter also supports SPI slave interface.

Configurable Delays

Sometimes slave devices need additional time to process data. In order to provide this time some adapters can insert delays on different data transmission stages.

DLN-4M and DLN-4S interface USB-SPI interface adapters can insert delays between data frames, delays after slave selection and delays between slave selections.

Configurable Delay Between Data Frames

In case a slave device is not fast enough to process continuously incoming data, a user can configure the USB-SPI adapter to insert delays between each two consecutive frames. This gives the slave device additional time to process data received in the previous frame. Once enabled, the delay is inserted after each frame.

Configurable Delay After Slave Selection

In case a slave device needs additional time for initialization, a Delay After Slave Selection (SS) can be used. When enabled, it is placed after an SS line assertion and before the first frame transmission.

Configurable Delay Between Slave Selections

Delay Between Slave Selections (SS) is inserted between one SS line release and assertion of another SS line.

SPI Bus Voltage

DLN-1 and DLN-2 USB-SPI interface adapters operate on 3.3V. However, its SPI interface pins are 5V-tolerant. This allows using the DLN-1 and DLN-2 adapters with 5V SPI circuits.
DLN-4M and DLN-4S USB-SPI interface adapters support 3.3V SPI bus voltage only.

Event-driven Interface

A major addition to DLN-4S USB-SPI adapter, in comparison with other interface adapters is the event driven interface. Since DLN-4S is the only USB-SPI interface adapter that features SPI slave interface, it can be configured to send SPI events, when functioning in SPI slave mode. You can preconfigure the event generation conditions and carry on with your tasks. Once the SPI master addresses the DLN-4S adapter, the adapter takes part in the SPI bus transaction and sends the event to your application via asynchronous interface. You can check the received events at your convenience. Two event types are available:

DLN_SPI_SLAVE_EVENT_SS_RISE
Events are generated when an SS line is released. This event type ignores the data transmitted and only monitors the state of the SS line.
DLN_SPI_SLAVE_EVENT_BUFFER_FULL
Event is generated when the allocated buffer becomes full with data received from SPI bus master. In this case a user must set the size of the buffer that stores the received data.

DLN-1, DLN-2 and DLN-4M USB-SPI interface adapters do not support SPI slave events.
DLN-4S supports SPI slave events.

Supported Operation Systems

All listed USB-SPI interface adapters can be used in MS Windows environment.

We are currently working on adding support of other operation systems for DLN-series interface adapters.

USB Interface

DLN-1 and DLN-2 USB-SPI adapters use full-speed (12 MHz) USB interface.
Since DLN-4M and DLN-4S adapters are based on USB high-speed (480 MHz) interface, they allow much faster SPI operation.

RoHS

The Directive on the restriction of the use of certain hazardous substances in electrical and electronic equipment 2002/95/EC (commonly referred to as the Restriction of Hazardous Substances Directive or RoHS) was adopted in February 2003 by the European Union. This directive restricts the use of six hazardous materials in the manufacture of various types of electronic and electrical equipment.

All Diolan products, including DLN-1, DLN-2, DLN-4M and DLN-4S USB-SPI adapters are RoHS compliant.