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| USB-I2C/SPI/GPIO Adapter - U2C-12 |
| USB-IO Interface Adapter - GPIO-12 |
USB PIC Bootloader. User Manual
5.4. XTEA - The Encryption Key
To prevent user application from unauthorized copying and to promote Bootloader fine performance it is recommended to set the following values of CONFIG registers. They enable the bootloader to perform all necessary operations with Flash memory, while denying access to external tools, e.g., programmers.
Table 5.1. Recommended CONFIG registers values
| Register | Value | Description | Status |
|---|---|---|---|
| 0x300006.bit7 | 1 | Background Debug | Disabled |
| 0x300008 | 0x08 | Code Protect 0x0800-0x1FFF | Enabled |
| Code Protect 0x2000-0x3FFF | Enabled | ||
| Code Protect 0x4000-0x5FFF | Enabled | ||
| 0x300009 | 0x80 | Data EE Read Protect | Disabled |
| Code Protect Boot | Enabled | ||
| 0x30000A | 0x0F | Table Write Protect 0x0800-0x1FFF | Disabled |
| Table Write Protect 0x2000-0x3FFF | Disabled | ||
| Table Write Protect 0x4000-0x5FFF | Disabled | ||
| 0x30000B | 0x80 | Data EE Write Protect | Disabled |
| Table Write Protect Boot | Enabled | ||
| Config Write Protect | Enabled | ||
| 0x30000C | 0x0F | Table Read Protect 0x0800-0x1FFF | Disabled |
| Table Read Protect 0x2000-0x3FFF | Disabled | ||
| Table Read Protect 0x4000-0x5FFF | Disabled | ||
| 0x30000D | 0x00 | Table Read Protect Boot | Enabled |
In Bootloader code CONFIG registers are set in boot.asm file as following:
CONFIG PLLDIV = 4 ; OSC/4 for 16MHz CONFIG CPUDIV = OSC1_PLL2 ; CPU_clk = PLL/2 CONFIG USBDIV = 2 ; USB_clk = PLL/2 CONFIG FOSC = HSPLL_HS ; HS osc PLL CONFIG FCMEN = ON ; Fail Safe Clock Monitor CONFIG IESO = OFF ; Int/Ext switchover mode CONFIG PWRT = ON ; PowerUp Timer CONFIG BOR = OFF ; Brown Out CONFIG VREGEN = ON ; Int Voltage Regulator CONFIG WDT = OFF ; WatchDog Timer CONFIG MCLRE = ON ; MCLR CONFIG LPT1OSC = OFF ; Low Power OSC CONFIG PBADEN = ON ; PORTB<4:0> A/D CONFIG CCP2MX = ON ; CCP2 Mux RC1 CONFIG STVREN = ON ; Stack Overflow Reset CONFIG LVP = OFF ; Low Voltage Programming CONFIG ICPRT = OFF ; ICP CONFIG XINST = ON ; Ext CPU Instruction Set CONFIG DEBUG = OFF ; Background Debugging CONFIG CP0 = ON ; Code Protect CONFIG CP1 = ON CONFIG CP2 = ON CONFIG CPB = ON ; Boot Sect Code Protect CONFIG CPD = OFF ; EEPROM Data Protect CONFIG WRT0 = OFF ; Table Write Protect CONFIG WRT1 = OFF CONFIG WRT2 = OFF CONFIG WRTB = ON ; Boot Table Write Protest CONFIG WRTC = ON ; CONFIG Write Protect CONFIG WRTD = OFF ; EEPROM Write Protect CONFIG EBTR0 = OFF ; Ext Table Read Protect CONFIG EBTR1 = OFF CONFIG EBTR2 = OFF CONFIG EBTRB = ON ; Boot Table Read Protect
