Featured product - USB-I2C/SPI/GPIO Adapter U2C-12
USB-I/O Interface Adapter GPIO-24. Programmer's Reference Manual.
13.2. gpio_24.h
#ifndef GPIO_REPORTS_H_INCLUDED
#define GPIO_REPORTS_H_INCLUDED
#ifdef __GNUC__
#define __PACKED_ATTR __attribute__ ((__packed__))
#else
#define __PACKED_ATTR /*nothing*/
#ifndef __18CXX
#pragma pack(push, 1)
#endif /* __18CXX */
#endif /* __GNUC__ */
// Status values
#define GPIO_ST_SUCCESS 0x0
#define GPIO_ST_INVALID_PARAMETER 0x1
#define GPIO_ST_INVALID_GPIO 0x2
#define GPIO_ST_INVALID_PORT 0x3
#define GPIO_ST_INVALID_CFG 0x4
#define GPIO_ST_COMMAND_NOT_SUPPORTED 0x5
#define GPIO_ST_COMMAND_SEND_FAILED 0x6
#define GPIO_ST_INVALID_CHANNEL 0x7
#define GPIO_ST_INVALID_HPWM_PERIOD 0x8
#define GPIO_ST_INVALID_CMP_MODE 0x9
#define GPIO_ST_INVALID_FR_CNT_NUMBER 0xa
#define GPIO_ST_UNKNOWN_EVENT_TYPE 0xb
#define GPIO_ST_INVALID_ADC_CFG 0xc
#define GPIO_ST_EEPROM_ERROR 0xd
#define GPIO_ST_INVALID_PLS_CNT_NUMBER 0xe
#define GPIO_ST_INVALID_MASK 0xf
#define GPIO_ST_ADC_ON 0x10
#define GPIO_ST_CMP_ON 0x11
#define GPIO_ST_HPWM_ON 0x12
// commands and responses
#define GPIO_SET_CFG 0x01
#define GPIO_GET_CFG 0x02
#define GPIO_SET_OUT_VAL 0x03
#define GPIO_GET_OUT_VAL 0x04
#define GPIO_SET_IN_CFG 0x05
#define GPIO_GET_IN_CFG 0x06
#define GPIO_SET_PWM_CFG 0x07
#define GPIO_GET_PWM_CFG 0x08
#define GPIO_GET_VAL 0x09
#define GPIO_MAKE_PULSE 0x0A
#define GPIO_GET_FW_VER 0x0B
#define GPIO_GET_SN 0x0C
#define GPIO_SET_DEV_ID 0x0D
#define GPIO_GET_DEV_ID 0x0E
#define GPIO_SET_CMP_CFG 0x0F
#define GPIO_GET_CMP_CFG 0x10
#define GPIO_GET_ADC_VAL 0x11
#define GPIO_SET_ADC_CFG 0x12
#define GPIO_GET_ADC_CFG 0x13
#define GPIO_SET_HPWM_CFG 0x14
#define GPIO_GET_HPWM_CFG 0x15
#define GPIO_SET_FR_CNT_CFG 0x16
#define GPIO_GET_FR_CNT_CFG 0x17
#define GPIO_GET_FR_CNT_VAL 0x18
#define GPIO_SET_PULL_UPS 0x19
#define GPIO_GET_PULL_UPS 0x1A
#define GPIO_SAVE_CFG_EEPROM 0x1B
#define GPIO_CLR_CFG_EEPROM 0x1C
#define GPIO_SET_PLS_CNT_CFG 0x1D
#define GPIO_GET_PLS_CNT_CFG 0x1E
#define GPIO_GET_PLS_CNT_VAL 0x1F
#define GPIO_SET_ADC_MODULE_CFG 0x20
#define GPIO_SET_ADC_CHANNEL_CFG 0x21
#define GPIO_GET_CMP_VAL 0x22
#define GPIO_SET_PULSE_CFG 0x23
#define GPIO_GET_PULSE_CFG 0x24
#define GPIO_GET_ADC_MODULE_CFG 0x25
#define GPIO_GET_ADC_CHANNEL_CFG 0x26
#define GPIO_GET_VDD 0x27
#define GPIO_SET_PLS_CNT_LIMIT 0x28
#define GPIO_GET_PLS_CNT_LIMIT 0x29
#define GPIO_RESUME_PLS_CNT 0x2a
#define GPIO_SUSPEND_PLS_CNT 0x2b
#define GPIO_RESET_PLS_CNT 0x2c
// events
#define GPIO_EV_DEVICE_ADDED 0x80
#define GPIO_EV_DEVICE_REMOVED 0x81
#define GPIO_EV_IN 0x82
#define GPIO_EV_ADC 0x83
#define GPIO_EV_CMP 0x84
#define GPIO_EV_FR_CNT 0x85
#define GPIO_EV_PLS_CNT 0x86
// GPIO configurations
#define GPIO_CFG_IN 0x0
#define GPIO_CFG_OUT 0x1
#define GPIO_CFG_PWM 0x2
#define GPIO_CFG_PULSE 0x3
#define GPIO_CFG_ADC_IN 0x4
#define GPIO_CFG_VREF_HIGH 0x5
#define GPIO_CFG_VREF_LOW 0x6
#define GPIO_CFG_CMP_IN_HI 0x7
#define GPIO_CFG_CMP_IN_LOW 0x8
#define GPIO_CFG_CMP_OUT 0x9
#define GPIO_CFG_CMP_NC 0xa
#define GPIO_CFG_FREQ 0xb
#define GPIO_CFG_CNT 0xc
#define GPIO_CFG_HPWM 0xd
#define GPIO_CFG_OUT_VREF 0xe
#define GPIO_CFG_NOT_CONFIGURED 0xf
// GPIO input pin phase configurations
#define GPIO_IN_EV_NONE 0x0
#define GPIO_IN_EV_LEV_0 0x1
#define GPIO_IN_EV_LEV_1 0x2
#define GPIO_IN_EV_RISING 0x3
#define GPIO_IN_EV_FALLING 0x4
#define GPIO_IN_EV_CHANGE 0x5
// GPIO Frequency counter event conditions
#define GPIO_FR_CNT_EV_NONE 0x0
#define GPIO_FR_CNT_EV_LESS 0x1
#define GPIO_FR_CNT_EV_NOT_EQ 0x2
#define GPIO_FR_CNT_EV_EQ 0x3
#define GPIO_FR_CNT_EV_ABOVE 0x4
#define GPIO_FR_CNT_EV_ALWAYS 0x5
// GPIO Pulse counter event conditions
#define GPIO_PLS_CNT_EV_OVFERFLOW 0x0
#define GPIO_PLS_CNT_EV_REPEAT 0x1
#define GPIO_PLS_CNT_EV_MATCH 0x2
// Pulse counter running modes
#define GPIO_PLS_CNT_MODE_FREE_RUN 0x0
#define GPIO_PLS_CNT_MODE_TIME_BASED 0x1
#define GPIO_PLS_CNT_MODE_PULSE_BASED 0x2
// Pulse counter value types
#define GPIO_PLS_CNT_VAL_PULSES 0x0
#define GPIO_PLS_CNT_VAL_TIME 0x1
// GPIO ADC event conditions
#define GPIO_ADC_EV_NONE 0x0
#define GPIO_ADC_EV_BELOW 0x1
#define GPIO_ADC_EV_ABOVE 0x2
#define GPIO_ADC_EV_OUTSIDE 0x3
#define GPIO_ADC_EV_INSIDE 0x4
#define GPIO_ACD_EV_ALWAYS 0x5
// GPIO Comparator event conditions
#define GPIO_CMP_EV_NONE 0x0
#define GPIO_CMP_EV_CHANGE 0x1
#define GPIO_CMP_EV_ALWAYS 0x2
// commands
typedef struct _GPIO_SET_CFG_CMD
{
unsigned char id; // = GPIO_SET_CFG;
unsigned char echo;
unsigned char port;
unsigned char mask;
unsigned char pins[4];
} __PACKED_ATTR GPIO_SET_CFG_CMD, *PGPIO_SET_CFG_CMD;
typedef struct _GPIO_GET_CFG_CMD
{
unsigned char id; // = GPIO_GET_CFG;
unsigned char echo;
unsigned char port;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_GET_CFG_CMD, *PGPIO_GET_CFG_CMD;
typedef struct _GPIO_SET_OUT_VAL_CMD
{
unsigned char id; // = GPIO_SET_OUT_VAL;
unsigned char echo;
unsigned char port;
unsigned char mask;
unsigned char val;
unsigned char reserved[3]; // must be 0
} __PACKED_ATTR GPIO_SET_OUT_VAL_CMD, *PGPIO_SET_OUT_VAL_CMD;
typedef struct _GPIO_GET_OUT_VAL_CMD
{
unsigned char id; // = GPIO_GET_OUT_VAL;
unsigned char echo;
unsigned char reserved[6]; // must be 0
} __PACKED_ATTR GPIO_GET_OUT_VAL_CMD, *PGPIO_GET_OUT_VAL_CMD;
typedef struct _GPIO_SET_IN_CFG_CMD
{
unsigned char id; // = GPIO_SET_IN_CFG;
unsigned char echo;
unsigned char port;
unsigned char mask;
unsigned char phase;
unsigned char debounce;
unsigned char repeat;
unsigned char reserved;
} __PACKED_ATTR GPIO_SET_IN_CFG_CMD, *PGPIO_SET_IN_CFG_CMD;
typedef struct _GPIO_GET_IN_CFG_CMD
{
unsigned char id; // = GPIO_GET_IN_CFG;
unsigned char echo;
unsigned char gpio;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_GET_IN_CFG_CMD, *PGPIO_GET_IN_CFG_CMD;
typedef struct _GPIO_SET_PWM_CFG_CMD
{
unsigned char id; // = GPIO_SET_PWM_CFG;
unsigned char echo;
unsigned char on: 4;
unsigned char port: 4;
unsigned char mask;
unsigned short t0;
unsigned short t1;
} __PACKED_ATTR GPIO_SET_PWM_CFG_CMD, *PGPIO_SET_PWM_CFG_CMD;
typedef struct _GPIO_GET_PWM_CFG_CMD
{
unsigned char id; // = GPIO_GET_PWM_CFG;
unsigned char echo;
unsigned char gpio;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_GET_PWM_CFG_CMD, *PGPIO_GET_PWM_CFG_CMD;
typedef struct _GPIO_GET_VAL_CMD
{
unsigned char id; // = GPIO_GET_VAL;
unsigned char echo;
unsigned char reserved[6]; // must be 0
} __PACKED_ATTR GPIO_GET_VAL_CMD, *PGPIO_GET_VAL_CMD;
typedef struct _GPIO_SET_PULSE_CFG_CMD
{
unsigned char id; // = GPIO_SET_PULSE_CFG;
unsigned char echo;
unsigned char gpio;
unsigned char val;
unsigned short t;
unsigned char reserved[2]; // must be 0
} __PACKED_ATTR GPIO_SET_PULSE_CFG_CMD, *PGPIO_SET_PULSE_CFG_CMD;
typedef struct _GPIO_GET_PULSE_CFG_CMD
{
unsigned char id; // = GPIO_GET_PULSE_CFG;
unsigned char echo;
unsigned char gpio;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_GET_PULSE_CFG_CMD, *PGPIO_GET_PULSE_CFG_CMD;
typedef struct _GPIO_MAKE_PULSE_CMD
{
unsigned char id; // = GPIO_MAKE_PULSE;
unsigned char echo;
unsigned char gpio;
unsigned char val;
unsigned short t;
unsigned short mode;
unsigned char reserved; // must be 0
} __PACKED_ATTR GPIO_MAKE_PULSE_CMD, *PGPIO_MAKE_PULSE_CMD;
typedef struct _GPIO_GET_FW_VER_CMD
{
unsigned char id; // = GPIO_GET_FW_VER;
unsigned char echo;
unsigned char reserved[6]; // must be 0
} __PACKED_ATTR GPIO_GET_FW_VER_CMD, *PGPIO_GET_FW_VER_CMD;
typedef struct _GPIO_GET_SN_CMD
{
unsigned char id; // = GPIO_GET_SN;
unsigned char echo;
unsigned char reserved[6]; // must be 0
} __PACKED_ATTR GPIO_GET_SN_CMD, *PGPIO_GET_SN_CMD;
typedef struct _GPIO_SET_DEV_ID_CMD
{
unsigned char id; // = GPIO_SET_DEV_ID;
unsigned char echo;
unsigned char dev_id;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_SET_DEV_ID_CMD, *PGPIO_SET_DEV_ID_CMD;
typedef struct _GPIO_GET_DEV_ID_CMD
{
unsigned char id; // = GPIO_SET_DEV_ID;
unsigned char echo;
unsigned char reserved[6]; // must be 0
} __PACKED_ATTR GPIO_GET_DEV_ID_CMD, *PGPIO_GET_DEV_ID_CMD;
typedef struct _GPIO_GET_ADC_VAL_CMD
{
unsigned char id; // = GPIO_GET_ADC_VAL;
unsigned char echo;
unsigned char channel1;
unsigned char channel2;
unsigned char reserved[4]; // must be 0
} __PACKED_ATTR GPIO_GET_ADC_VAL_CMD, *PGPIO_GET_ADC_VAL_CMD;
typedef struct _GPIO_SET_ADC_CFG_CMD
{
unsigned char id; // = 0x12;
unsigned char echo;
unsigned char channel: 4;
unsigned char vref: 2;
unsigned char on: 2;
unsigned char repeat;
unsigned short low_threshold;
unsigned short hi_threshold;
} __PACKED_ATTR GPIO_SET_ADC_CFG_CMD, *PGPIO_SET_ADC_CFG_CMD;
typedef struct _GPIO_SET_ADC_MODULE_CFG_CMD
{
unsigned char id; // = GPIO_SET_ADC_MODULE_CFG;
unsigned char echo;
unsigned char on;
unsigned char vref;
unsigned char reset_channels;
unsigned char reserved[3]; // must be 0
} __PACKED_ATTR GPIO_SET_ADC_MODULE_CFG_CMD, *PGPIO_SET_ADC_MODULE_CFG_CMD;
typedef struct _GPIO_SET_ADC_CHANNEL_CFG_CMD
{
unsigned char id; // = GPIO_SET_ADC_CHANNEL_CFG;
unsigned char echo;
unsigned char channel: 4;
unsigned char event_condition: 4;
unsigned char repeat;
unsigned short low_threshold;
unsigned short hi_threshold;
} __PACKED_ATTR GPIO_SET_ADC_CHANNEL_CFG_CMD, *PGPIO_SET_ADC_CHANNEL_CFG_CMD;
typedef struct _GPIO_GET_ADC_CFG_CMD
{
unsigned char id; // = GPIO_GET_ADC_CFG;
unsigned char echo;
unsigned char channel;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_GET_ADC_CFG_CMD, *PGPIO_GET_ADC_CFG_CMD;
typedef struct _GPIO_GET_ADC_MODULE_CFG_CMD
{
unsigned char id; // = GPIO_GET_ADC_MODULE_CFG;
unsigned char echo;
unsigned char reserved[6]; // must be 0
} __PACKED_ATTR GPIO_GET_ADC_MODULE_CFG_CMD, *PGPIO_GET_ADC_MODULE_CFG_CMD;
typedef struct _GPIO_GET_ADC_CHANNEL_CFG_CMD
{
unsigned char id; // = GPIO_GET_ADC_CHANNEL_CFG;
unsigned char echo;
unsigned char channel;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_GET_ADC_CHANNEL_CFG_CMD, *PGPIO_GET_ADC_CHANNEL_CFG_CMD;
typedef struct _GPIO_SET_CMP_CFG_CMD
{
unsigned char id; // = GPIO_SET_CMP_CFG;
unsigned char echo;
union
{
struct
{
unsigned char mode: 4;
unsigned char cmp1_inv: 1;
unsigned char cmp0_inv: 1;
unsigned char cis: 1;
unsigned char reserved: 1;
} cmp_cfg_bit_fields;
unsigned char cmp_cfg_byte;
} cmp_cfg;
union
{
struct
{
unsigned char multiplier: 4;
unsigned char range: 1;
unsigned char ext_source: 1;
unsigned char output: 1;
unsigned char reserved: 1;
} vref_bit_fields;
unsigned char vref_byte;
} vref;
unsigned char repeat0_low;
unsigned char cond0: 4;
unsigned char repeat0_hi: 4;
unsigned char repeat1_low;
unsigned char cond1: 4;
unsigned char repeat1_hi: 4;
} __PACKED_ATTR GPIO_SET_CMP_CFG_CMD, *PGPIO_SET_CMP_CFG_CMD;
typedef struct _GPIO_GET_CMP_CFG_CMD
{
unsigned char id; // = GPIO_GET_CMP_CFG;
unsigned char echo;
unsigned char reserved[6];// must be 0
} __PACKED_ATTR GPIO_GET_CMP_CFG_CMD, *PGPIO_GET_CMP_CFG_CMD;
typedef struct _GPIO_GET_CMP_VAL_CMD
{
unsigned char id; // = GPIO_GET_CMP_VAL;
unsigned char echo;
unsigned char reserved[6];// must be 0
} __PACKED_ATTR GPIO_GET_CMP_VAL_CMD, *PGPIO_GET_CMP_VAL_CMD;
typedef struct _GPIO_SET_HPWM_CFG_CMD
{
unsigned char id; // = GPIO_SET_HPWM_CFG;
unsigned char echo;
unsigned char hpwm_number;
unsigned char on;
unsigned short t;
unsigned short t1;
} __PACKED_ATTR GPIO_SET_HPWM_CFG_CMD, *PGPIO_SET_HPWM_CFG_CMD;
typedef struct _GPIO_GET_HPWM_CFG_CMD
{
unsigned char id; // = GPIO_GET_HPWM_CFG;
unsigned char echo;
unsigned char hpwm_number;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_GET_HPWM_CFG_CMD, *PGPIO_GET_HPWM_CFG_CMD;
typedef struct _GPIO_SET_FR_CNT_CFG_CMD
{
unsigned char id; // = GPIO_SET_FR_CNT_CFG;
unsigned char echo;
//unsigned char on_fr_number;
unsigned char fr_cnt_number: 4;
unsigned char on: 4;
unsigned char repeat;
unsigned char comp_val[3];
unsigned char event_cond;
} __PACKED_ATTR GPIO_SET_FR_CNT_CFG_CMD, *PGPIO_SET_FR_CNT_CFG_CMD;
typedef struct _GPIO_GET_FR_CNT_CFG_CMD
{
unsigned char id; // = GPIO_GET_FR_CNT_CFG;
unsigned char echo;
unsigned char fr_cnt_number;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_GET_FR_CNT_CFG_CMD, *PGPIO_GET_FR_CNT_CFG_CMD;
typedef struct _GPIO_GET_FR_CNT_VAL_CMD
{
unsigned char id; // = GPIO_GET_FR_CNT_VAL;
unsigned char echo;
unsigned char fr_cnt_number;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_GET_FR_CNT_VAL_CMD, *PGPIO_GET_FR_CNT_VAL_CMD;
typedef struct _GPIO_SET_PULL_UPS_CMD
{
unsigned char id; // = GPIO_SET_PULL_UPS;
unsigned char echo;
unsigned char pins_group1;
unsigned char pins_group2;
unsigned char reserved[4]; // must be 0
} __PACKED_ATTR GPIO_SET_PULL_UPS_CMD, *PGPIO_SET_PULL_UPS_CMD;
typedef struct _GPIO_GET_PULL_UPS_CMD
{
unsigned char id; // = GPIO_GET_PULL_UPS;
unsigned char echo;
unsigned char reserved[6]; // must be 0
} __PACKED_ATTR GPIO_GET_PULL_UPS_CMD, *PGPIO_GET_PULL_UPS_CMD;
typedef struct _GPIO_SAVE_CFG_EEPROM_CMD
{
unsigned char id; // = GPIO_SAVE_CFG_EEPROM;
unsigned char echo;
unsigned char reserved[6]; // must be 0
} __PACKED_ATTR GPIO_SAVE_CFG_EEPROM_CMD, *PGPIO_SAVE_CFG_EEPROM_CMD;
typedef struct _GPIO_CLR_CFG_EEPROM_CMD
{
unsigned char id; // = GPIO_CLR_CFG_EEPROM;
unsigned char echo;
unsigned char reserved[6]; // must be 0
} __PACKED_ATTR GPIO_CLR_CFG_EEPROM_CMD, *PGPIO_CLR_CFG_EEPROM_CMD;
/*
typedef struct _GPIO_SET_PLS_CNT_CFG_CMD
{
unsigned char id; // = GPIO_SET_PLS_CNT_CFG;
unsigned char echo;
unsigned char pls_cnt_number: 4;
unsigned char on: 4;
unsigned char event_cond: 4;
unsigned char pls_cnt_mode: 4;
unsigned char repeat;
unsigned char timeORcnt_val[3];
} __PACKED_ATTR GPIO_SET_PLS_CNT_CFG_CMD, *PGPIO_SET_PLS_CNT_CFG_CMD;
*/
typedef struct _GPIO_SET_PLS_CNT_CFG_CMD
{
unsigned char id; // = GPIO_SET_PLS_CNT_CFG;
unsigned char echo;
union
{
unsigned char byte_control;
struct
{
unsigned char pls_cnt_number: 1;
unsigned char on: 1;
unsigned char suspended: 1;
unsigned char reserved: 5;
} bit_fields_control;
} control;
union
{
unsigned char byte_cfg;
struct
{
unsigned char ev_overflow: 1;
unsigned char ev_repeat: 1;
unsigned char ev_match: 1;
unsigned char reserved: 1;
unsigned char pls_cnt_mode: 4;
} bit_fields_cfg;
} cfg;
unsigned char repeat;
unsigned char reserved[3];
} __PACKED_ATTR GPIO_SET_PLS_CNT_CFG_CMD, *PGPIO_SET_PLS_CNT_CFG_CMD;
typedef struct _GPIO_GET_PLS_CNT_CFG_CMD
{
unsigned char id; // = GPIO_GET_PLS_CNT_CFG;
unsigned char echo;
unsigned char pls_cnt_number;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_GET_PLS_CNT_CFG_CMD, *PGPIO_GET_PLS_CNT_CFG_CMD;
typedef struct _GPIO_SET_PLS_CNT_LIMIT_CMD
{
unsigned char id; // = GPIO_SET_PLS_CNT_LIMIT;
unsigned char echo;
unsigned char pls_cnt_number;
unsigned char limit_type;
unsigned char limit[3];
unsigned char reserved; // must be 0
} __PACKED_ATTR GPIO_SET_PLS_CNT_LIMIT_CMD, *PGPIO_SET_PLS_CNT_LIMIT_CMD;
typedef struct _GPIO_GET_PLS_CNT_LIMIT_CMD
{
unsigned char id; // = GPIO_GET_PLS_CNT_LIMIT;
unsigned char echo;
unsigned char pls_cnt_number;
unsigned char limit_type;
unsigned char reserved[4]; // must be 0
} __PACKED_ATTR GPIO_GET_PLS_CNT_LIMIT_CMD, *PGPIO_GET_PLS_CNT_LIMIT_CMD;
typedef struct _GPIO_GET_PLS_CNT_VAL_CMD
{
unsigned char id; // = GPIO_GET_PLS_CNT_VAL;
unsigned char echo;
unsigned char pls_cnt_number;
unsigned char value_type;
unsigned char reserved[4]; // must be 0
} __PACKED_ATTR GPIO_GET_PLS_CNT_VAL_CMD, *PGPIO_GET_PLS_CNT_VAL_CMD;
typedef struct _GPIO_RESUME_PLS_CNT_CMD
{
unsigned char id; // = GPIO_RESUME_PLS_CNT;
unsigned char echo;
unsigned char pls_cnt_number;
unsigned char reset_timer;
unsigned char reset_counter;
unsigned char reserved[3]; // must be 0
} __PACKED_ATTR GPIO_RESUME_PLS_CNT_CMD, *PGPIO_RESUME_PLS_CNT_CMD;
typedef struct _GPIO_SUSPEND_PLS_CNT_CMD
{
unsigned char id; // = GPIO_SUSPEND_PLS_CNT;
unsigned char echo;
unsigned char pls_cnt_number;
unsigned char reset_timer;
unsigned char reset_counter;
unsigned char reserved[3]; // must be 0
} __PACKED_ATTR GPIO_SUSPEND_PLS_CNT_CMD, *PGPIO_SUSPEND_PLS_CNT_CMD;
typedef struct _GPIO_RESET_PLS_CNT_CMD
{
unsigned char id; // = GPIO_RESET_PLS_CNT;
unsigned char echo;
unsigned char pls_cnt_number;
unsigned char reset_timer;
unsigned char reset_counter;
unsigned char reserved[3]; // must be 0
} __PACKED_ATTR GPIO_RESET_PLS_CNT_CMD, *PGPIO_RESET_PLS_CNT_CMD;
typedef struct _GPIO_GET_VDD_CMD
{
unsigned char id; // = GPIO_GET_VDD;
unsigned char echo;
unsigned char reserved[6]; // must be 0
} __PACKED_ATTR GPIO_GET_VDD_CMD, *PGPIO_GET_VDD_CMD;
// responses
typedef struct _GPIO_SET_CFG_RSP
{
unsigned char id; // = GPIO_SET_CFG;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];
} __PACKED_ATTR GPIO_SET_CFG_RSP, *PGPIO_SET_CFG_RSP;
typedef struct _GPIO_GET_CFG_RSP
{
unsigned char id; // = GPIO_GET_CFG;
unsigned char echo;
unsigned char st;
unsigned char port;
unsigned char pins[4];
} __PACKED_ATTR GPIO_GET_CFG_RSP, *PGPIO_GET_CFG_RSP;
typedef struct _GPIO_SET_OUT_VAL_RSP
{
unsigned char id; // = GPIO_SET_OUT_VAL;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_OUT_VAL_RSP, *PGPIO_SET_OUT_VAL_RSP;
typedef struct _GPIO_GET_OUT_VAL_RSP
{
unsigned char id; // = GPIO_GET_OUT_VAL;
unsigned char echo;
unsigned char st;
unsigned char port[3];
unsigned char reserved[2]; // must be 0
} __PACKED_ATTR GPIO_GET_OUT_VAL_RSP, *PGPIO_GET_OUT_VAL_RSP;
typedef struct _GPIO_SET_IN_CFG_RSP
{
unsigned char id; // = GPIO_SET_IN_CFG;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_IN_CFG_RSP, *PGPIO_SET_IN_CFG_RSP;
typedef struct _GPIO_GET_IN_CFG_RSP
{
unsigned char id; // = GPIO_GET_IN_CFG;
unsigned char echo;
unsigned char st;
unsigned char gpio;
unsigned char phase;
unsigned char debounce;
unsigned char repeat;
unsigned char reserved;// must be 0
} __PACKED_ATTR GPIO_GET_IN_CFG_RSP, *PGPIO_GET_IN_CFG_RSP;
typedef struct _GPIO_SET_PWM_CFG_RSP
{
unsigned char id; // = GPIO_SET_PWM_CFG;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_PWM_CFG_RSP, *PGPIO_SET_PWM_CFG_RSP;
typedef struct _GPIO_GET_PWM_CFG_RSP
{
unsigned char id; // = GPIO_GET_PWM_CFG;
unsigned char echo;
unsigned char st;
unsigned char gpio: 7;
unsigned char on: 1;
unsigned short t0;
unsigned short t1;
} __PACKED_ATTR GPIO_GET_PWM_CFG_RSP, *PGPIO_GET_PWM_CFG_RSP;
typedef struct _GPIO_GET_VAL_RSP
{
unsigned char id; // = GPIO_GET_VAL;
unsigned char echo;
unsigned char st;
unsigned char port[3];
unsigned char reserved[2]; // must be 0
} __PACKED_ATTR GPIO_GET_VAL_RSP, *PGPIO_GET_VAL_RSP;
typedef struct _GPIO_SET_PULSE_CFG_RSP
{
unsigned char id; // = GPIO_SET_PULSE_CFG;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_PULSE_CFG_RSP, *PGPIO_SET_PULSE_CFG_RSP;
typedef struct _GPIO_GET_PULSE_CFG_RSP
{
unsigned char id; // = GPIO_GET_PULSE_CFG;
unsigned char echo;
unsigned char st;
unsigned char gpio;
unsigned char state;
unsigned char val;
unsigned short t;
} __PACKED_ATTR GPIO_GET_PULSE_CFG_RSP, *PGPIO_GET_PULSE_CFG_RSP;
typedef struct _GPIO_MAKE_PULSE_RSP
{
unsigned char id; // = GPIO_MAKE_PULSE;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_MAKE_PULSE_RSP, *PGPIO_MAKE_PULSE_RSP;
typedef struct _GPIO_GET_FW_VER_RSP
{
unsigned char id; // = GPIO_GET_FW_VER;
unsigned char echo;
unsigned char st;
unsigned char major;
unsigned char minor;
unsigned char sub_minor;
unsigned char reserved[2]; // must be 0
} __PACKED_ATTR GPIO_GET_FW_VER_RSP, *PGPIO_GET_FW_VER_RSP;
typedef struct _GPIO_GET_SN_RSP
{
unsigned char id; // = GPIO_GET_SN;
unsigned char echo;
unsigned char st;
unsigned char upper_sn;
unsigned char hi_sn;
unsigned char low_sn;
unsigned char lowest_sn;
unsigned char reserved; // must be 0
} __PACKED_ATTR GPIO_GET_SN_RSP, *PGPIO_GET_SN_RSP;
typedef struct _GPIO_SET_DEV_ID_RSP
{
unsigned char id; // = GPIO_SET_DEV_ID;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_DEV_ID_RSP, *PGPIO_SET_DEV_ID_RSP;
typedef struct _GPIO_GET_DEV_ID_RSP
{
unsigned char id; // = GPIO_GET_DEV_ID;
unsigned char echo;
unsigned char st;
unsigned char dev_id;
unsigned char reserved[4]; // must be 0
} __PACKED_ATTR GPIO_GET_DEV_ID_RSP, *PGPIO_GET_DEV_ID_RSP;
typedef struct _GPIO_GET_ADC_VAL_RSP
{
unsigned char id; // = GPIO_GET_ADC_VAL;
unsigned char echo;
unsigned char st;
unsigned short channel1;
unsigned short channel2;
unsigned char reserved;// must be 0
} __PACKED_ATTR GPIO_GET_ADC_VAL_RSP, *PGPIO_GET_ADC_VAL_RSP;
typedef struct _GPIO_SET_ADC_CFG_RSP
{
unsigned char id; // = 0x12;
unsigned char echo;
unsigned char st;
unsigned char on;
unsigned char reserved[4];// must be 0
} __PACKED_ATTR GPIO_SET_ADC_CFG_RSP, *PGPIO_SET_ADC_CFG_RSP;
typedef struct _GPIO_SET_ADC_MODULE_CFG_RSP
{
unsigned char id; // = GPIO_SET_ADC_MODULE_CFG;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_ADC_MODULE_CFG_RSP, *PGPIO_SET_ADC_MODULE_CFG_RSP;
typedef struct _GPIO_SET_ADC_CHANNEL_CFG_RSP
{
unsigned char id; // = GPIO_SET_ADC_CHANNEL_CFG;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_ADC_CHANNEL_CFG_RSP, *PGPIO_SET_ADC_CHANNEL_CFG_RSP;
typedef struct _GPIO_GET_ADC_CFG_RSP
{
unsigned char id; // = GPIO_GET_ADC_CFG;
unsigned char echo;
unsigned char vref: 2;
unsigned char on: 2;
unsigned char st: 4;
unsigned char repeat;
unsigned short low_threshold;
unsigned short hi_threshold;
} __PACKED_ATTR GPIO_GET_ADC_CFG_RSP, *PGPIO_GET_ADC_CFG_RSP;
typedef struct _GPIO_GET_ADC_MODULE_CFG_RSP
{
unsigned char id; // = GPIO_GET_ADC_MODULE_CFG;
unsigned char echo;
unsigned char st;
unsigned char on;
unsigned char vref;
unsigned char reserved[3];
} __PACKED_ATTR GPIO_GET_ADC_MODULE_CFG_RSP, *PGPIO_GET_ADC_MODULE_CFG_RSP;
typedef struct _GPIO_GET_ADC_CHANNEL_CFG_RSP
{
unsigned char id; // = GPIO_GET_ADC_CHANNEL_CFG;
unsigned char echo;
unsigned char event_condition: 4;
unsigned char st: 4;
unsigned char repeat;
unsigned short low_threshold;
unsigned short hi_threshold;
} __PACKED_ATTR GPIO_GET_ADC_CHANNEL_CFG_RSP, *PGPIO_GET_ADC_CHANNEL_CFG_RSP;
typedef struct _GPIO_SET_CMP_CFG_RSP
{
unsigned char id; // = GPIO_SET_CMP_CFG;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_CMP_CFG_RSP, *PGPIO_SET_CMP_CFG_RSP;
typedef struct _GPIO_GET_CMP_CFG_RSP
{
unsigned char id; // = GPIO_GET_CMP_CFG;
unsigned char echo;
union
{
struct
{
unsigned char mode: 4;
unsigned char cmp1_inv: 1;
unsigned char cmp0_inv: 1;
unsigned char cis: 1;
unsigned char reserved: 1;
} cmp_cfg_bit_fields;
unsigned char cmp_cfg_byte;
} cmp_cfg;
union
{
struct
{
unsigned char multiplier: 4;
unsigned char range: 1;
unsigned char ext_source: 1;
unsigned char output: 1;
unsigned char reserved: 1;
} vref_bit_fields;
unsigned char vref_byte;
} vref;
unsigned char repeat0_low;
unsigned char cond0: 4;
unsigned char repeat0_hi: 4;
unsigned char repeat1_low;
unsigned char cond1: 4;
unsigned char repeat1_hi: 4;
} __PACKED_ATTR GPIO_GET_CMP_CFG_RSP, *PGPIO_GET_CMP_CFG_RSP;
typedef struct _GPIO_GET_CMP_VAL_RSP
{
unsigned char id; // = GPIO_GET_CMP_VAL;
unsigned char echo;
unsigned char st;
unsigned char cmp_0_out;
unsigned char cmp_1_out;
unsigned char reserved[3];// must be 0
} __PACKED_ATTR GPIO_GET_CMP_VAL_RSP, *PGPIO_GET_CMP_VAL_RSP;
typedef struct _GPIO_SET_HPWM_CFG_RSP
{
unsigned char id; // = GPIO_SET_HPWM_CFG;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_HPWM_CFG_RSP, *PGPIO_SET_HPWM_CFG_RSP;
typedef struct _GPIO_GET_HPWM_CFG_RSP
{
unsigned char id; // = GPIO_GET_HPWM_CFG;
unsigned char echo;
unsigned char st;
unsigned char hpwm_number: 4;
unsigned char on: 4;
unsigned short t;
unsigned short t1;
} __PACKED_ATTR GPIO_GET_HPWM_CFG_RSP, *PGPIO_GET_HPWM_CFG_RSP;
typedef struct _GPIO_SET_FR_CNT_CFG_RSP
{
unsigned char id; // = GPIO_SET_FR_CNT_CFG;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_FR_CNT_CFG_RSP, *PGPIO_SET_FR_CNT_CFG_RSP;
typedef struct _GPIO_GET_FR_CNT_CFG_RSP
{
unsigned char id; // = GPIO_GET_FR_CNT_CFG;
unsigned char echo;
unsigned char on: 4;
unsigned char st: 4;
unsigned char repeat;
unsigned char comp_val[3];
unsigned char event_cond;
} __PACKED_ATTR GPIO_GET_FR_CNT_CFG_RSP, *PGPIO_GET_FR_CNT_CFG_RSP;
typedef struct _GPIO_GET_FR_CNT_VAL_RSP
{
unsigned char id; // = GPIO_GET_FR_CNT_VAL;
unsigned char echo;
unsigned char st;
unsigned char fr_cnt_number;
unsigned char frequency[3];
unsigned char reserved;// must be 0
} __PACKED_ATTR GPIO_GET_FR_CNT_VAL_RSP, *PGPIO_GET_FR_CNT_VAL_RSP;
typedef struct _GPIO_SET_PULL_UPS_RSP
{
unsigned char id; // = GPIO_SET_PULL_UPS;
unsigned char echo;
unsigned char st;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_SET_PULL_UPS_RSP, *PGPIO_SET_PULL_UPS_RSP;
typedef struct _GPIO_GET_PULL_UPS_RSP
{
unsigned char id; // = GPIO_GET_PULL_RSP;
unsigned char echo;
unsigned char st;
unsigned char pins_group1;
unsigned char pins_group2;
unsigned char reserved[3]; // must be 0
} __PACKED_ATTR GPIO_GET_PULL_UPS_RSP, *PGPIO_GET_PULL_UPS_RSP;
typedef struct _GPIO_SAVE_CFG_EEPROM_RSP
{
unsigned char id; // = GPIO_SAVE_CFG_EEPROM;
unsigned char echo;
unsigned char st;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_SAVE_CFG_EEPROM_RSP, *PGPIO_SAVE_CFG_EEPROM_RSP;
typedef struct _GPIO_CLR_CFG_EEPROM_RSP
{
unsigned char id; // = GPIO_CLR_CFG_EEPROM;
unsigned char echo;
unsigned char st;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_CLR_CFG_EEPROM_RSP, *PGPIO_CLR_CFG_EEPROM_RSP;
typedef struct _GPIO_SET_PLS_CNT_CFG_RSP
{
unsigned char id; // = GPIO_SET_PLS_CNT_CFG;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];// must be 0
} __PACKED_ATTR GPIO_SET_PLS_CNT_CFG_RSP, *PGPIO_SET_PLS_CNT_CFG_RSP;
/*
typedef struct _GPIO_GET_PLS_CNT_CFG_RSP
{
unsigned char id; // = GPIO_GET_PLS_CNT_CFG;
unsigned char echo;
unsigned char on: 4;
unsigned char st: 4;
unsigned char event_cond: 4;
unsigned char pls_cnt_mode: 4;
unsigned char repeat;
unsigned char timeORcnt_val[3];
} __PACKED_ATTR GPIO_GET_PLS_CNT_CFG_RSP, *PGPIO_GET_PLS_CNT_CFG_RSP;
*/
typedef struct _GPIO_GET_PLS_CNT_CFG_RSP
{
unsigned char id; // = GPIO_GET_PLS_CNT_CFG;
unsigned char echo;
unsigned char st;
union
{
unsigned char byte_control;
struct
{
unsigned char pls_cnt_number: 1;
unsigned char on: 1;
unsigned char suspended: 1;
unsigned char reserved: 5;
} bit_fields_control;
} control;
union
{
unsigned char byte_cfg;
struct
{
unsigned char ev_overflow: 1;
unsigned char ev_repeat: 1;
unsigned char ev_match: 1;
unsigned char reserved: 1;
unsigned char pls_cnt_mode: 4;
} bit_fields_cfg;
} cfg;
unsigned char repeat;
unsigned char reserved[2];
} __PACKED_ATTR GPIO_GET_PLS_CNT_CFG_RSP, *PGPIO_GET_PLS_CNT_CFG_RSP;
typedef struct _GPIO_SET_PLS_CNT_LIMIT_RSP
{
unsigned char id; // = GPIO_SET_PLS_CNT_LIMIT;
unsigned char echo;
unsigned char st;
unsigned char reserved[5]; // must be 0
} __PACKED_ATTR GPIO_SET_PLS_CNT_LIMIT_RSP, *PGPIO_SET_PLS_CNT_LIMIT_RSP;
typedef struct _GPIO_GET_PLS_CNT_LIMIT_RSP
{
unsigned char id; // = GPIO_GET_PLS_CNT_LIMIT;
unsigned char echo;
unsigned char st;
unsigned char pls_cnt_number;
unsigned char limit_type;
unsigned char limit[3];
} __PACKED_ATTR GPIO_GET_PLS_CNT_LIMIT_RSP, *PGPIO_GET_PLS_CNT_LIMIT_RSP;
typedef struct _GPIO_GET_PLS_CNT_VAL_RSP
{
unsigned char id; // = GPIO_GET_PLS_CNT_VAL;
unsigned char echo;
unsigned char st;
unsigned char pls_cnt_number;
unsigned char value_type;
unsigned char value[3];
} __PACKED_ATTR GPIO_GET_PLS_CNT_VAL_RSP, *PGPIO_GET_PLS_CNT_VAL_RSP;
typedef struct _GPIO_RESUME_PLS_CNT_RSP
{
unsigned char id; // = GPIO_RESUME_PLS_CNT;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];
} __PACKED_ATTR GPIO_RESUME_PLS_CNT_RSP, *PGPIO_RESUME_PLS_CNT_RSP;
typedef struct _GPIO_SUSPEND_PLS_CNT_RSP
{
unsigned char id; // = GPIO_SUSPEND_PLS_CNT;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];
} __PACKED_ATTR GPIO_SUSPEND_PLS_CNT_RSP, *PGPIO_SUSPEND_PLS_CNT_RSP;
typedef struct _GPIO_RESET_PLS_CNT_RSP
{
unsigned char id; // = GPIO_RESET_PLS_CNT;
unsigned char echo;
unsigned char st;
unsigned char reserved[5];
} __PACKED_ATTR GPIO_RESET_PLS_CNT_RSP, *PGPIO_RESET_PLS_CNT_RSP;
typedef struct _GPIO_GET_VDD_RSP
{
unsigned char id; // = GPIO_GET_VDD;
unsigned char echo;
unsigned char st;
unsigned char vdd;
unsigned char reserved[4];// must be 0
} __PACKED_ATTR GPIO_GET_VDD_RSP, *PGPIO_GET_VDD_RSP;
// events
typedef struct _GPIO_IN_EV
{
unsigned char id; // GPIO_EV_IN
unsigned char cnt;
unsigned char value[3];
unsigned char mask[3];
} __PACKED_ATTR GPIO_IN_EV, *PGPIO_IN_EV;
typedef struct _GPIO_ADC_EV
{
unsigned char id; // GPIO_EV_ADC
unsigned char cnt;
unsigned char channel;
unsigned short adc_val;
unsigned char event_condition;
unsigned char reserved[2]; // must be 0
} __PACKED_ATTR GPIO_ADC_EV,*PGPIO_ADC_EV;
typedef struct _GPIO_CMP_EV
{
unsigned char id; // GPIO_EV_CMP
unsigned char cnt;
unsigned char cmp0_out;
unsigned char cmp1_out;
unsigned char event_cond0;
unsigned char event_cond1;
unsigned char reserved[2]; // must be 0
} __PACKED_ATTR GPIO_CMP_EV, *PGPIO_CMP_EV;
typedef struct _GPIO_FR_CNT_EV
{
unsigned char id; // GPIO_EV_FR_CNT
unsigned char cnt;
unsigned char frequency[3];
unsigned char fr_cnt_number;
unsigned char reserved[2]; // must be 0
} __PACKED_ATTR GPIO_FR_CNT_EV, *PGPIO_FR_CNT_EV;
typedef struct _GPIO_PLS_CNT_EV
{
unsigned char id; // GPIO_EV_PLS_CNT
unsigned char cnt;
unsigned char event_type;
unsigned char pls_cnt_number;
unsigned char value[3];
unsigned char value_type;
} __PACKED_ATTR GPIO_PLS_CNT_EV, *PGPIO_PLS_CNT_EV;
#ifndef __GNUC__
#ifndef __18CXX
#pragma pack(pop)
#endif /* __18CXX */
#endif
#endif // GPIO_REPORTS_H_INCLUDED
