SPI Master Commands and Responses
The following commands and responses are used to control and monitor the SPI master module of a DLN-series adapter.
| Command/Response | Description |
|---|---|
| DLN_SPI_MASTER_GET_PORT_COUNT | Retrieves the number of SPI master ports available at your DLN-series PC-SPI adapter. |
| DLN_SPI_MASTER_ENABLE | Activates the specified SPI master port of your PC-SPI adapter. |
| DLN_SPI_MASTER_DISABLE | Deactivates the specified SPI master port of your PC-SPI adapter. |
| DLN_SPI_MASTER_IS_ENABLED | Checks whether the specified SPI master port is activated or not. |
| DLN_SPI_MASTER_SET_MODE | Configures SPI transmission parameters (CPOL and CPHA) for the specified SPI master port of your PC-SPI adapter. |
| DLN_SPI_MASTER_GET_MODE | Retrieves SPI transmission parameters (CPOL and CPHA) for the specified SPI master port of your PC-SPI adapter. |
| DLN_SPI_MASTER_SET_FRAME_SIZE | Configures the size of a single portion of data (SPI frame) transferred at SPI bus. |
| DLN_SPI_MASTER_GET_FRAME_SIZE | Retrieves the size of a single portion of data (SPI frame) transferred at SPI bus. |
| DLN_SPI_MASTER_SET_FREQUENCY | Configures the clock frequency on the SCLK line. The SCLK line synchronizes data transfer between SPI master and SPI slave devices. |
| DLN_SPI_MASTER_GET_FREQUENCY | Retrieves current setting for SPI bus clock frequency. |
| DLN_SPI_MASTER_READ_WRITE | Simultaneously sends and receives data via SPI bus. |
| DLN_SPI_MASTER_SET_DELAY_BETWEEN_SS | Configures a minimum delay between release of one SS line and assertion of another SS line. |
| DLN_SPI_MASTER_GET_DELAY_BETWEEN_SS | Retrieves current setting for minimum delay between release of one SS line and assertion of another SS line. |
| DLN_SPI_MASTER_SET_DELAY_AFTER_SS | Configures a minimum delay between assertion of an SS line and transfer of the first data bit. |
| DLN_SPI_MASTER_GET_DELAY_AFTER_SS | Retrieves current setting for delay between assertion of an SS line and start of data transmission. |
| DLN_SPI_MASTER_SET_DELAY_BETWEEN_FRAMES | Configures a minimum delay between SPI data frames on a single SS line. |
| DLN_SPI_MASTER_GET_DELAY_BETWEEN_FRAME | Retrieves current setting for delay between SPI data frames on a single SS line. |
| DLN_SPI_MASTER_SET_SS | Selects a Slave Select (SS) line to be used during the next data transfer between your PC-SPI adapter and SPI slave device. |
| DLN_SPI_MASTER_GET_SS | Retrieves Slave Select (SS) lines used during data transfer between your PC-SPI adapter and SPI slave device. |
| DLN_SPI_MASTER_SS_BETWEEN_FRAMES_ENABLE | Configures your PC-SPI adapter to release SS line between successive SPI data frames. |
| DLN_SPI_MASTER_SS_BETWEEN_FRAMES_DISABLE | Deactivates SS line release between successive SPI data frame for the specified SPI master port. |
| DLN_SPI_MASTER_SS_BETWEEN_FRAMES_IS_ENABLED | Checks whether PC-SPI adapter releases the SS line between successive SPI data frames or not. |
2006-2012